Projects by ShogunYash

This repository contains a collection of projects developed in various domains, ranging from FPGA-based systems to game simulations, optimization algorithms, and data structures. Below are the projects I've worked on, along with brief descriptions:

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Projects

1. 4HexDisplayFPGA

   • FPGA-based project for controlling a 4-digit 7-segment display. Implemented timing and multiplexing to efficiently display values.

2. AES_Decryption

   • FPGA implementation of AES-128 bit decryption using VHDL. Utilized Finite State Machines (FSM) for efficient decryption across multiple rounds.

3. AVL Tree-Augmented Bin Packing

   • Designed an optimized bin-packing algorithm using AVL trees to manage space efficiently in a dynamic bin packing scenario.

4. Distributed-Load-Scheduler

   • Developed a dynamic load balancing system with priority-based scheduling to optimize resources and minimize delays in distributed systems.

5. Dynamic-Hashing-Library

   • Implemented a dynamic hashing system to handle load factors, supporting efficient and scalable data management in hash tables.

6. Flight Planner

   • Developed a graph-based flight planning system that finds the optimal flight paths based on multiple factors like cost, distance, and time.

7. MUX_4X1

   • Designed a 4-to-1 multiplexer using VHDL for FPGA implementation, optimizing the selection of inputs based on control signals.

8. Maze Solver

   • Developed a maze-solving algorithm using depth-first search (DFS) and breadth-first search (BFS) to find the shortest path in a maze.

9. Mind Games

   • Created strategic game models and simulations using Monte Carlo methods and dynamic programming to optimize decision-making for Alice and Bob.

10. Optimal-Gate-Packing-BoundingBox

    • Implemented a gate-packing algorithm for circuit design, optimizing the bounding box size and minimizing wire lengths using geometric packing methods.

11. PathDelayOptimizer

    • Developed a path delay optimization system for circuit design, improving performance by reducing signal propagation delays.

12. Ruin to Returns

    • Analyzed and simulated a gambling scenario using dynamic programming and probability calculations to predict game outcomes.

13. Wiring-Aware-Gate-Placement

    • Optimized gate placement in circuit design, considering wire lengths and signal delay to minimize wiring overhead.

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Technologies Used

• VHDL
• Python
• Monte Carlo Simulations
• Dynamic Programming
• FPGA
• Graph Algorithms
• Optimization Techniques

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Contributors

• ShogunYash

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License

This project is licensed under the MIT License. See the LICENSE file for details.